Browsing by Author "Anitha, M"

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    Implementation of DDR SDRAM Memory Conroller
    (2017-08-11T11:34:14Z) Kavya, K; Anitha, M; Diana, Lenita Dias
    The memorycontroller is a digital circuit that manages the flow of data going to and from the computer's mainmemory. A memory controller can be a separate chip or integrated into another chip, such as being placed on the same die or as an integral part of a microprocessor; in the latter case, it is usually called an integratedmemorycontroller (IMC). A memory controller is sometimes also called a memory chip controller (MCC)or a memory controller unit (MCU). Memory controllers contain the logic necessary to read and write to memory. Reading and writing to the memory is performed by selecting the row and column data addresses of the memory as the inputs to the decoder circuit, where the converted inputs are used to select the correct memory location and return the data, which is then passed back through a multiplexer to consolidate the data in order to reduce the required bus width for the operation. Bus width is the number of parallel lines available to communicate with the memory cell. Memory controllers' bus widths range from 8-bit in earlier systems, to 512-bit in more complicated systems. In our design, the bus width of the address bus is 12 bits, 6 bits for the row address and 6 bits for the column address. This allows the memory size to be of 4096 cells (212 =4096). The bus width for the data bus is 16 bits. This means 16 bits of data can be transferred at a time from a particular memory location. Some memory controllers can be connected to different kinds of devices at the same time, including SDRAM, SRAM, ROM, and memory-mapped I/O; each kind of these devices requires a slightly different control bus, while the memory controller presents a common system bus / front-side bus to the processor. Some memory controllers also include error detection and correction hardware.