Browsing by Author "PRIYANKA, G REDDY"

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    Design of A 16 Bit ASAR ADC Using Split Array DAC
    (2017-08-30T05:07:16Z) PRIYANKA, G REDDY
    The Data Converters are the interface between analog and digital domain. Moving towards digitization ,the ADCs play an important role in conversion of real world analog signals to digital logic levels. Among various ADC architectures Flash ADC, Pipelined ADC, SAR ADC are prominent .The SAR ADC is most promising topology among them for providing medium to high resolution and better performance. The objective is the design of a 16-bit ASAR ADC using a Split array DAC . The ASAR ADC architecture consists of a Comparator ,SAR Logic block and a DAC.A ready pulse(clock) generated by XOR circuitry is used as trigger signal for SAR logic block. Hence, the design claims to be asynchronous, avoiding an external clock .The necessary factors like high resolution and speed , with moderate power consumption can be achieved by using a split array DAC. These combination of factors are ideal for applications like portable/battery powered devices, data/signal acquisition systems. The work presents the design of a 16 bit ASAR ADC in 45nm technology using Tanner Tool.