Design and development of a high-efficient nanowire fet for emerging logic devices
| dc.contributor.author | Harshavardhan PR 1NH21EC066; Niranjan sharma SH 1NH21EC110; Harshitha S 1NH21EE037; Likhitha M 1NH21EE051 | |
| dc.date.accessioned | 2025-05-19T07:29:40Z | |
| dc.date.available | 2025-05-19T07:29:40Z | |
| dc.date.issued | 2025 | |
| dc.description.abstract | The exponential growth of semiconductor technology has driven the need for advanced transistor designs to overcome the limitations of traditional planar Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFETs). As device dimensions shrink to sub-nanometer scales, critical challenges such as short-channel effects (SCEs), increased leakage currents, and elevated power dissipation arise, hampering performance and increasing manufacturing complexities. In response, Gate-All-Around (GAA) FETs have emerged as a revolutionary architecture, offering superior electrostatic control, reduced SCEs, and enhanced scalability. These attributes make GAA FETs ideal candidates for next-generation logic devices. Among the innovative implementations of GAA FETs, nanowire technology stands out as a game-changer. By utilizing cylindrical or quasi-cylindrical channels completely surrounded by the gate, nanowire FETs deliver unparalleled gate control, minimized leakage, and improved switching performance. This design not only supports extreme miniaturization but also ensures energy efficiency and high-frequency operation, aligning perfectly with the demands of modern applications such as artificial intelligence, 5G, and IoT. Despite these architectural advancements, there exists a gap in understanding the influence of different channel materials on the performance of GAA nanowire FETs. Silicon (Si), a widely used semiconductor material, offers excellent manufacturability and well-established fabrication processes. However, wide-bandgap materials like Silicon Carbide (SiC) and Gallium Nitride (GaN) provide unique advantages, such as higher breakdown voltages, superior thermal conductivity, and lower leakage currents, making them attractive for high-power and high-frequency applications. This project, "Design and Development of a High-Efficient Nanowire FET for Emerging Logic Devices," conducts a comprehensive comparative analysis of GAA nanowire FETs with Si, SiC, and GaN as channel materials. The study evaluates critical performance parameters, including threshold voltage (Vth), subthreshold slope (SS), and the on/off current ratio (Ion/Ioff). Advanced simulation techniques are used to explore the interplay between material properties, device design, and scalability. The findings underscore the importance of material selection in optimizing nanowire GAA FETs for specific applications. While Si remains a versatile option for general-purpose logic devices, SiC and GaN demonstrate superior performance for high-power, high-frequency applications. This research bridges the gap between architecture and material innovation, paving the way for high-efficiency, scalable, and sustainable logic devices that surpass the limitations of conventional MOSFETs. The outcomes contribute significantly to the advancement of semiconductor technology, enabling novel computing and IoT applications. . | |
| dc.identifier.uri | http://192.168.75.5:4000/handle/123456789/18985 | |
| dc.language.iso | en | |
| dc.publisher | NHCE | |
| dc.title | Design and development of a high-efficient nanowire fet for emerging logic devices | |
| dc.type | Learning Object |