Analysis of ECT Using Parallel VLSI Architectur
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Date
2016-07-13T10:11:06Z
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Abstract
This paper presents a architecture for real time electrical capacitance analysis using VLSI. It consists of front end module which gives accurate capacitance value in time multiplexed manner using capacitance to digital converter technique. The architecture consists of dual port built in memory banks to save the sensitivity matrix, accurate capacitance value and the image. It is used to reduce the quantization errors of the image in order to improve the image quality. To check the preciseness bit level simulation is used.
The recommended architecture is used to increase the speed of the system three times than the previous version. It uses the combination of linear back projection, landweber and modified landweber algorithms to improve the throughput. Image reconstruction is the main task involved in analysis of ECT. The algorithms mentioned are used to reconstruct the image with good accuracy. The proposed system is used to reconstruct the image of RGB colour pixels with better speed andaccuracy.ECT finds the main application in process tomography to measure the density of the flows inside vessel or closed pipes.
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Lavanya, Analysis of ECT Using Parallel VLSI Architectur